|
Data Input Specifications |
|
Data Pattern |
128 bit Fixed pattern, or PRBS (2^7-1
or 2^31-1) |
|
Data Input Type |
DC Coupled, Differential |
|
Input Data Rate |
20 Gb/s min., 24 Gb/s max. |
|
Input Data Amplitude |
0.1 Vpp min., 0.8 Vpp max. |
|
Differential Input Impedance |
100 Ω typ. |
|
Lock Mode |
Lock to ref clock or lock to data |
|
Electrical Connectors |
2.92 mm Female (K or SMA compa.) |
|
Clock Input Specifications |
|
Ref Clock Input Frequency |
622.5 MHz min., 750 MHz max. |
|
Ref Clock Input Amplitude |
-5 dBm min., 0 dBm typ., 3 dBm max |
|
Recovered Clock Frequency |
622.5 MHz min., 750 MHz max. |
|
Clock Connectors |
SMA female |